Example embodiments of the inventive concepts disclosed herein relate to semiconductor memory devices, and more particularly to memory devices including a parity error detection circuit.
Memory devices are being used as a voice and image data storage medium of information devices such as a computer, a cellular phone, a smartphone, a personal digital assistant (PDA), a digital camera, a camcorder, a voice recorder, an MP3 player, a handheld PC, a game console, a facsimile, a scanner, and a printer. Consumer's demands for memory devices are being diversified as memory devices are used as a storage medium in various devices.
Accordingly, technologies for high-capacity, high-speed, and/or low-power memory devices are being developed. As data processing of devices that support various functions increases, the capacity and speed of memory devices are increasing and accelerating. However, the probability that an error is generated upon receiving signals becomes higher as an operating speed of a memory device becomes higher. Thus, securing a stable operation of a memory device becomes a challenge.
To secure a stable operation of a high-speed memory device, the memory device may exchange data with a memory controller by using a parity scheme. For example, some memory devices use a parity error detection circuit to check whether data transmitted in the parity scheme are received without distortion.